MOS 8721 PLA dump V2, by Nicolas Welte

The files in this archive contain a memory dump of the C128's PLA chip. This
chip has 27 inputs and 18 outputs, but the C128 doesn't make use of all of them.
Nevertheless all combinations of inputs were used and all outputs were
monitored. The first version of this project only contained the actually used
PLA parts and might be preferrable for its smaller file size. 

The chip used is labeled:

top:               bottom:

MOS                PHILIPPINES
8721R3             IH421862
4385                   3

The PLA was connected in the following way to the PC parallel port (PS/2 mode,
both data and control lines are bidirectional). The input lines were addressed
by a 24 bit counter that was clocked by a parallel port line. Two 4040 12bit
counters were used, the first one was clocked by the /C0 line, the CLR line(s)
controlled by C1. The A11 output of the first counter was also connected to the
CLK input of the second counter, to create a 24 bit counter. See the supplied C
program for details. The remaining 3 PLA input lines were connected to a jumper
and two LPT lines, see the table for details. The 18bit PLA output was split
into two sets of output files, one which holds 14 bits of the output in a word
aligned format and another one that holds the remaining 4 bits in a byte aligned
format. Again, see the table for details.

PC parallel port lines are named by the register they belong to, i.e. D for
Data, S for Status and C for Control, and by the register bit they correspond
to.

PLA     signal          signal/LPT register    position in word dump / byte dump
 1      A15                     A20                     A21              A20
 2      A14                     A19                     A20              A19
 3      A13                     A18                     A19              A18
 4      A12                     A17                     A18              A17
 5      A11                     A16                     A17              A16
 6      A10                     A15                     A16              A15
 7      VICFIX                  /C0                     A25              A24
 8      DMAACK                  /C3                     A26              A25
 9      AEC                     A14                     A15              A14
10      R/W                     A13                     A14              A13
11      GAME                    A12                     A13              A12
12      EXROM                   A11                     A12              A11
13      Z80 EN                  A22                     A23              A22
14      Z80 I/O                 A21                     A22              A21
15      64/128                  A23                     A24              A23
16      I/O SE                  A10                     A11              A10
17      ROMBANKHI               A9                      A10              A9
18      ROMBANKLO               A8                      A9               A8
19      VMA4                    A7                      A8               A7
20      VMA5                    A6                      A7               A6
21      BA                      A5                      A6               A5
22      LORAM                   A4                      A5               A4
23      HIRAM                   A3                      A4               A3
24      VSS                     VSS
25      CHAREN                  A2                      A3               A2
26      VA14                    A1                      A2               A1
27      128/256                 Jumper                  A27              A26
28      N/C                     N/C
29      /SDEN                   N/C                                      D3
30      /ROML                   /S7                     D13
31      /ROMH                   S6                      D12
32      CLRBNK                  S5                      D11
33      /FROM                   S4                      D10
34      /ROM4                   N/C                                      D2
35      /ROM3                   S3                      D9
36      /ROM2                   N/C                                      D1
37      /ROM1                   C2                      D8
38      /I/O CS                 D7                      D7
39      DIR                     N/C                                      D0
40      DWE                     D6                      D6
41      CASENB                  D5                      D5
42      /VIC                    D4                      D4
43      /I/O ACC                D3                      D3
44      GWE                     D2                      D2
45      /COLRAM                 D1                      D1
46      /CHAROM                 D0                      D0
47      CLK                     A0                      A1
48      VCC                     VCC

For a more detailed description of the PLA interface lines, have a look at the
C128 technical literature, like the Programmer's Reference Guide or the Service
Manual.

Many thanks go to Wolfgang Moser, who donated the PLA chip and some other
valuable C128 chips to me. If you have a 1581 drive and a PC, have a look at his
great program, 1581copy!

I can be reached via email <welte@chemie.uni-konstanz.de>